Leaders Explore Emerging Challenges for Integrating Photonics and Electronics in Data Centers
Speakers representing various parts of the supply chain participated in the virtual OIDA Workshop on Developments in Co-Packaging Technologies for Data Centers held 30 – 31 March 2021.
Caption: Peter O'Brien, 2021 OIDA Workshop Committee Member
The program explored how technologies can address emerging application requirements for future data centers. The technology session covered all aspects of the supply chain, from co-packaging design to device foundries, assembly and packaging to advanced manufacturing equipment.
Panel sessions delved into the pros and cons of laser integration, reliability requirements, training the future workforce and the technology overlap with other markets that use integrated photonics.
“The latter topic was of particular interest as there are numerous emerging mass-markets such as LIDAR and Biosensing that have similar manufacturing requirements to those for data centers,” said Peter O’Brien, Tyndall National Institute, Ireland. “This would be an exciting theme for a future workshop, where invited speakers from other markets present their views on emerging manufacturing challenges and to see if there are areas for cross-market collaboration.”
Panelists recognized the need and opportunity for these different markets to develop common manufacturing standards rather than work in isolation, O’Brien added.
“The idea of integrating photonic devices together with electronic processors and switch chips has long been discussed and anticipated as a future evolutionary step of electronics for computing and networking,” said Daniel Kilper, University of Dublin Trinity College, Ireland. “One message that came through clearly at the OIDA Workshop is that it’s no longer a question of when, but instead how.”
During the opening sessions, speakers from Nvidia, Microsoft, Intel, Broadcom, Tencent and Cisco laid out their visions and roadmaps for co-packaging photonics in their chips and data centers. Discussion revolved around integration and packaging strategies using chiplets and tiles and whether the laser source would be included in the package or outside the chip serving as an ‘optical power supply’.
Caption: Dan Kilper, 2021 OIDA Workshop Committee Member
Roadmaps target aggressive capacity increases using multi-Terabit/sec interfaces to scale switching chips to 50 and 100 Tbit/sec capacities. An important metric for co-packaged optics is the ‘shoreline density’ in Gigabits/sec/mm or the bandwidth density along the edge of the chip, which for co-packaged optics can reach 100’s-1000’s Gb/s/mm.
A key question is how to get the power per bit down from 10’s pJ/bit today to the single digit pJ/bit needed in the future. Specialty processors for Artificial Intelligence applications were identified as one of the leading platforms needing the highest density and highest speed for co-packaged optics.
Workshop attendees can visit the program page to access the OIDA workshop video links.