Quantify Intra-Lane Skew vs. Bit Error Rate at 32Gbaud PAM4 Signal

In the high-speed backplane and interconnect, the intra-lane skew of the differential signal (P/N) becomes one of the major factors to reduce the eye margin. Because of the small phase margin of PAM4 signal, it has a huge impact to cause the errors in the data transmission. In this webinar hosted by the Optical Communications Technical Group, Hiroshi Goto will quantify the intra-lane skew versus BER (Bit Error Rate) at 32Gbaud PAM4 signal (PCIe 6.0) with the repeatable skew control. Goto’s presentation will show a novel and reliable method for introducing granular intra-pair skew into the channel and measuring the impact of BER.

What You Will Learn:

• How to quantify the intra-lane skew versus BER (Bit Error Rate) at 32Gbaud PAM4 signal (PCIe 6.0) with Anritsu’s test solution
• A novel method for introducing granular intra-pair skew into the channel

Who Should Attend:

• Chip, board, and systems design engineers

About the Presenter: Hiroshi Goto, Anritsu

Hiroshi Goto is a seasoned expert in high-speed and optical engineering, bringing over 35 years of innovation and leadership at Anritsu Company. Throughout his career, he has worn many hats—Design Engineer, Product Marketing Engineer, and now High-Speed & Optical Product Manager and Sr. Business Development Manager—each role deepening his expertise in cutting-edge signal integrity and optical communication technologies.

A Physics graduate from Aoyama Gakuin University in Tokyo, Mr. Goto has played a pivotal role in advancing industry standards, authoring numerous application notes and white papers, and frequently sharing his insights as a respected speaker at industry events. Residing in the Dallas area, he continues to drive innovation in high-speed data transmission and optical networking, ensuring the future of high-performance communications.